Field
Embodiments of the present disclosure generally relate to the field of maskless lithography. More specifically, embodiments provided herein relate to a system and method for performing maskless digital lithography manufacturing processes.
Description of the Related Art
Photolithography is widely used in the manufacturing of semiconductor devices and display devices, such as liquid crystal displays (LCDs). Large area substrates are often utilized in the manufacture of LCDs. LCDs, or flat panels, are commonly used for active matrix displays, such as computers, touch panel devices, personal digital assistants (PDAs), cell phones, television monitors, and the like. Generally, flat panels may include a layer of liquid crystal material forming pixels sandwiched between two plates. When power from the power supply is applied across the liquid crystal material, an amount of light passing through the liquid crystal material may be controlled at pixel locations enabling images to be generated.
Microlithography techniques are generally employed to create electrical features incorporated as part of the liquid crystal material layer forming the pixels. According to this technique, a light-sensitive photoresist is typically applied to at least one surface of the substrate. Then, a pattern generator exposes selected areas of the light-sensitive photoresist as part of a pattern with light to cause chemical changes to the photoresist in the selective areas to prepare these selective areas for subsequent material removal and/or material addition processes to create the electrical features.
In order to continue to provide display devices and other devices to consumers at the prices demanded by consumers, new apparatuses, approaches, and systems are needed to precisely and cost-effectively create patterns on substrates, such as large area substrates.
As the foregoing illustrates, there is a need for an improved technique for data tuning for fast computation and polygonal manipulation simplification within digital lithography. More specifically, what is needed in the art is a data tuning application which selectively merges convex polygons to minimize the polygon count while limiting the loss of edge fidelity.